We’ve done a lot of posts on how to use the Lattice iCEstick ranging from FPGA tutorials to how to use one as a logic analyzer. If you picked up one of these inexpensive boards here’s a fun little experiment. [T4D10N] saw a project [Hamster] put together to send SOS on the FM radio band using nothing but an FPGA. [Hamster used a Spartan], so he decided to do the same trick using an iCEstick with the open source IceStorm tools.
You might be surprised that the whole thing only takes 53 lines of Verilog — less if you cut out comments and whitespace. That’s because it uses the FPGA’s built-in PLL to generate a fast clock and then uses a phase accumulator divider to produce three frequencies on the FM radio band; one for a carrier and two for a tone, spaced 150 Hz apart. The result is really frequency shift keying but you can hear the results on an FM radio.
We know, we know. It is probably illegal to broadcast on the FM radio band in some places. however, unless you amplify the signal and use an antenna, this is basically radio frequency interference. The other thing is we couldn’t bear to send SOS no matter how faintly, so we changed the message string from:
reg [33:0] message = 34'b1010100011101110111000101010000000;
to
reg [33:0] message = 34'b1010100011111111111000101010000000;
That makes it send “S long dash S” which, in some circles might be S0S (a long dash is sometimes used informally as a zero by straight key operators). The FPGA starts at the right and shift message over one spot each time beep_counter rolls over.
You can clearly hear the signal on 100 MHz, although the square wave is noisy sounding as you might expect. However, we bumped it down to 25 MHz and took a spectrum of it and it was better than we expected (see image above; the center line is 25 MHz and the scale is 5 MHz/division). Of course, that was admittedly a low bar to clear.
[Hamster’s] original code was in VHDL and for a Spartan 6. We’ve seen digital electronics generate RF before, of course. We’ve even seen it in color.
Source:: Hackaday