ThunderScope datapath

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Hackaday Prize 2021 Finalist ThunderScope is doing exactly that. [Aleska] is building a modular open source PC-connected oscilloscope aiming at four channels and a cool 100 MHz bandwidth with a low budget. The detailed project logs, showing how he is learning about ‘scope technology on-the-fly is a fascinating look into the mind of an engineer as he navigates the ups and downs of a reasonably complicated build.

We like how [Aleska] has realised early on, that keeping the project private and only releasing it when “I’m done” actually impedes progress, when you could open source from the beginning, log progress and get great feedback right from the start. All those obvious mistakes and poor design choices get caught and fixed before committing to hardware. Just think of all the time saved. Now this is an attitude to cultivate!

Modular Design

A modular approach to de-risk the hardware design is a good call, allowing upgrades or alternative functional modules to be dropped in as the need arises. Need to swap out a single-ended frontend for a differential one, or on one with some other specialised function? Sure, just pop it out and drop in the replacement and crack on.

A Neat USB 3.0 Trick

<img data-attachment-id="491771" data-permalink="https://hackaday.com/2021/08/17/why-buy-a-new-scope-when-you-can-just-build-one/aproposedusb3-0hostinterfacedesign/" data-orig-file="https://hackaday.com/wp-content/uploads/2021/08/aproposedusb3.0hostinterfacedesign.png" data-orig-size="1611,621" data-comments-opened="1" data-image-meta='{"aperture":"0","credit":"","camera":"","caption":"","created_timestamp":"0","copyright":"","focal_length":"0","iso":"0","shutter_speed":"0","title":"","orientation":"0"}' data-image-title="aproposedusb3.0hostinterfacedesign" data-image-description="

https://numato.com/kb/usb-3-0-a-cost-effective-high-bandwidth-solution-for-fpga-host-interface/

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Neat USB 3.0 trick

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From numato.com

The data path pulls samples from the HMCAD1511 ADC on eight 1-GBit/s LVDS lanes, feeding them into the SERDES blocks on a Spartan 6 FPGA. Inside that, a FIFO takes the deserialised (parallel) data and synchronises it into the clock domain of the USB interfaces, as well as buffering during periods when the USB is busy. This allows the use of an off-the-shelf USB 3.0 FIFO interface chip from our good friends at FTDI to deal with all that messy interfacing.

Next the ADC itself needs configuration, the programmable frontend also, not to mention the FPGA requires its bitstream loading via JTAG during development. All this ‘side-channel’ stuff is dealt with via a USB 2.0 interface chip (again from FTDI).

This neat trick of inserting a USB 2.0 Hub takes advantage of the way USB 3.0 connectors can have both USB 3.0 super-speed ports and high-speed ports operating in parallel, so you can wire the super-speed port direct to the FT601 interface chip, and stick a hub chip in the USB 2.0 path and then feed other USB 2.0 devices from the same connector. A simple, but clever trick to save both cost and complexity!

The eagle-eyed will notice that some of the traditional oscilloscope circuit functions are missing, notably a hardware trigger. This design is hinging on the speed of modern PCs to enable this function to be implemented adequately by the scope application when continuously fed with all the sample data.

We shall watch with interest how well this pans out.